mirror of
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100 lines
3.6 KiB
Batchfile
100 lines
3.6 KiB
Batchfile
/*----------------------------------------------------------------------------*/
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/* sys_link.cmd */
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/* */
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/*
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* Copyright (C) 2009-2016 Texas Instruments Incorporated - www.ti.com
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the
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* distribution.
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*
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* Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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/* */
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/*----------------------------------------------------------------------------*/
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/* USER CODE BEGIN (0) */
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/* USER CODE END */
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/*----------------------------------------------------------------------------*/
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/* Linker Settings */
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--retain="*(.intvecs)"
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/* USER CODE BEGIN (1) */
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/* USER CODE END */
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/*----------------------------------------------------------------------------*/
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/* Memory Map */
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MEMORY
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{
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VECTORS (X) : origin=0x00000000 length=0x00000020
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FLASH0 (RX) : origin=0x00000020 length=0x0013FFE0
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STACKS (RW) : origin=0x08000000 length=0x00001500
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RAM (RW) : origin=0x08001500 length=0x0002EB00
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/* USER CODE BEGIN (2) */
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/* USER CODE END */
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}
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/* USER CODE BEGIN (3) */
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/* USER CODE END */
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/*----------------------------------------------------------------------------*/
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/* Section Configuration */
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SECTIONS
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{
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.intvecs : {} > VECTORS
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.text : {} > FLASH0
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.const : {} > FLASH0
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.cinit : {} > FLASH0
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.pinit : {} > FLASH0
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.bss : {} > RAM
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.data : {} > RAM
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.sysmem : {} > RAM
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/* USER CODE BEGIN (4) */
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.init_array : {} > FLASH0
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/* USER CODE END */
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}
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/* USER CODE BEGIN (5) */
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/* USER CODE END */
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/*----------------------------------------------------------------------------*/
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/* Misc */
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/* USER CODE BEGIN (6) */
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/* USER CODE END */
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/*----------------------------------------------------------------------------*/
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