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441 lines
15 KiB
C
441 lines
15 KiB
C
/********************************************************************
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* Copyright (C) 2003-2008 Texas Instruments Incorporated.
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* All Rights Reserved
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*********************************************************************
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* file: cslr_i2c.h
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*
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* Brief: This file contains the Register Description for i2c
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*
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*********************************************************************/
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#ifndef _CSLR_I2C_H_
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#define _CSLR_I2C_H_
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#include <cslr.h>
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#include <tistdtypes.h>
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#include <csl_general.h>
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/* Minimum unit = 2 bytes */
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/**************************************************************************\
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* Register Overlay Structure
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\**************************************************************************/
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typedef struct {
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volatile Uint16 ICOAR;
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volatile Uint16 RSVD0[3];
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volatile Uint16 ICIMR;
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volatile Uint16 RSVD1[3];
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volatile Uint16 ICSTR;
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volatile Uint16 RSVD2[3];
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volatile Uint16 ICCLKL;
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volatile Uint16 RSVD3[3];
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volatile Uint16 ICCLKH;
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volatile Uint16 RSVD4[3];
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volatile Uint16 ICCNT;
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volatile Uint16 RSVD5[3];
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volatile Uint16 ICDRR;
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volatile Uint16 RSVD6[3];
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volatile Uint16 ICSAR;
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volatile Uint16 RSVD7[3];
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volatile Uint16 ICDXR;
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volatile Uint16 RSVD8[3];
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volatile Uint16 ICMDR;
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volatile Uint16 RSVD9[3];
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volatile Uint16 ICIVR;
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volatile Uint16 RSVD10[3];
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volatile Uint16 ICEMDR;
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volatile Uint16 RSVD11[3];
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volatile Uint16 ICPSC;
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volatile Uint16 RSVD12[3];
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volatile Uint16 ICPID1;
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volatile Uint16 RSVD13[3];
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volatile Uint16 ICPID2;
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} CSL_I2cRegs;
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/**************************************************************************\
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* Field Definition Macros
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\**************************************************************************/
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/* ICOAR */
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#define CSL_I2C_ICOAR_OADDR_MASK (0x03FFu)
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#define CSL_I2C_ICOAR_OADDR_SHIFT (0x0000u)
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#define CSL_I2C_ICOAR_OADDR_RESETVAL (0x0000u)
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#define CSL_I2C_ICOAR_RESETVAL (0x0000u)
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/* ICIMR */
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#define CSL_I2C_ICIMR_AAS_MASK (0x0040u)
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#define CSL_I2C_ICIMR_AAS_SHIFT (0x0006u)
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#define CSL_I2C_ICIMR_AAS_RESETVAL (0x0000u)
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/*----AAS Tokens----*/
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#define CSL_I2C_ICIMR_AAS_DISABLE (0x0000u)
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#define CSL_I2C_ICIMR_AAS_ENABLE (0x0001u)
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#define CSL_I2C_ICIMR_SCD_MASK (0x0020u)
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#define CSL_I2C_ICIMR_SCD_SHIFT (0x0005u)
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#define CSL_I2C_ICIMR_SCD_RESETVAL (0x0000u)
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/*----SCD Tokens----*/
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#define CSL_I2C_ICIMR_SCD_DISABLE (0x0000u)
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#define CSL_I2C_ICIMR_SCD_ENABLE (0x0001u)
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#define CSL_I2C_ICIMR_ICXRDY_MASK (0x0010u)
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#define CSL_I2C_ICIMR_ICXRDY_SHIFT (0x0004u)
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#define CSL_I2C_ICIMR_ICXRDY_RESETVAL (0x0000u)
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/*----ICXRDY Tokens----*/
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#define CSL_I2C_ICIMR_ICXRDY_DISABLE (0x0000u)
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#define CSL_I2C_ICIMR_ICXRDY_ENABLE (0x0001u)
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#define CSL_I2C_ICIMR_ICRRDY_MASK (0x0008u)
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#define CSL_I2C_ICIMR_ICRRDY_SHIFT (0x0003u)
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#define CSL_I2C_ICIMR_ICRRDY_RESETVAL (0x0000u)
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/*----ICRRDY Tokens----*/
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#define CSL_I2C_ICIMR_ICRRDY_DISABLE (0x0000u)
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#define CSL_I2C_ICIMR_ICRRDY_ENABLE (0x0001u)
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#define CSL_I2C_ICIMR_ARDY_MASK (0x0004u)
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#define CSL_I2C_ICIMR_ARDY_SHIFT (0x0002u)
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#define CSL_I2C_ICIMR_ARDY_RESETVAL (0x0000u)
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/*----ARDY Tokens----*/
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#define CSL_I2C_ICIMR_ARDY_DISABLE (0x0000u)
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#define CSL_I2C_ICIMR_ARDY_ENABLE (0x0001u)
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#define CSL_I2C_ICIMR_NACK_MASK (0x0002u)
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#define CSL_I2C_ICIMR_NACK_SHIFT (0x0001u)
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#define CSL_I2C_ICIMR_NACK_RESETVAL (0x0000u)
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/*----NACK Tokens----*/
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#define CSL_I2C_ICIMR_NACK_DISABLE (0x0000u)
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#define CSL_I2C_ICIMR_NACK_ENABLE (0x0001u)
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#define CSL_I2C_ICIMR_AL_MASK (0x0001u)
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#define CSL_I2C_ICIMR_AL_SHIFT (0x0000u)
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#define CSL_I2C_ICIMR_AL_RESETVAL (0x0000u)
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/*----AL Tokens----*/
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#define CSL_I2C_ICIMR_AL_DISABLE (0x0000u)
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#define CSL_I2C_ICIMR_AL_ENABLE (0x0001u)
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#define CSL_I2C_ICIMR_RESETVAL (0x0000u)
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/* ICSTR */
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#define CSL_I2C_ICSTR_SDIR_MASK (0x4000u)
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#define CSL_I2C_ICSTR_SDIR_SHIFT (0x000Eu)
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#define CSL_I2C_ICSTR_SDIR_RESETVAL (0x0000u)
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/*----SDIR Tokens----*/
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#define CSL_I2C_ICSTR_SDIR_CLEAR (0x0000u)
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#define CSL_I2C_ICSTR_SDIR_SET (0x0001u)
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#define CSL_I2C_ICSTR_NACKSNT_MASK (0x2000u)
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#define CSL_I2C_ICSTR_NACKSNT_SHIFT (0x000Du)
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#define CSL_I2C_ICSTR_NACKSNT_RESETVAL (0x0000u)
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/*----NACKSNT Tokens----*/
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#define CSL_I2C_ICSTR_NACKSNT_CLEAR (0x0000u)
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#define CSL_I2C_ICSTR_NACKSNT_SET (0x0001u)
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#define CSL_I2C_ICSTR_BB_MASK (0x1000u)
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#define CSL_I2C_ICSTR_BB_SHIFT (0x000Cu)
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#define CSL_I2C_ICSTR_BB_RESETVAL (0x0000u)
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/*----BB Tokens----*/
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#define CSL_I2C_ICSTR_BB_CLEAR (0x0000u)
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#define CSL_I2C_ICSTR_BB_SET (0x0001u)
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#define CSL_I2C_ICSTR_RSFULL_MASK (0x0800u)
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#define CSL_I2C_ICSTR_RSFULL_SHIFT (0x000Bu)
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#define CSL_I2C_ICSTR_RSFULL_RESETVAL (0x0000u)
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/*----RSFULL Tokens----*/
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#define CSL_I2C_ICSTR_RSFULL_CLEAR (0x0000u)
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#define CSL_I2C_ICSTR_RSFULL_SET (0x0001u)
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#define CSL_I2C_ICSTR_XSMT_MASK (0x0400u)
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#define CSL_I2C_ICSTR_XSMT_SHIFT (0x000Au)
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#define CSL_I2C_ICSTR_XSMT_RESETVAL (0x0001u)
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/*----XSMT Tokens----*/
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#define CSL_I2C_ICSTR_XSMT_CLEAR (0x0000u)
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#define CSL_I2C_ICSTR_XSMT_SET (0x0001u)
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#define CSL_I2C_ICSTR_AAS_MASK (0x0200u)
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#define CSL_I2C_ICSTR_AAS_SHIFT (0x0009u)
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#define CSL_I2C_ICSTR_AAS_RESETVAL (0x0000u)
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/*----AAS Tokens----*/
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#define CSL_I2C_ICSTR_AAS_CLEAR (0x0000u)
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#define CSL_I2C_ICSTR_AAS_SET (0x0001u)
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#define CSL_I2C_ICSTR_AD0_MASK (0x0100u)
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#define CSL_I2C_ICSTR_AD0_SHIFT (0x0008u)
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#define CSL_I2C_ICSTR_AD0_RESETVAL (0x0000u)
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/*----AD0 Tokens----*/
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#define CSL_I2C_ICSTR_AD0_CLEAR (0x0000u)
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#define CSL_I2C_ICSTR_AD0_SET (0x0001u)
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#define CSL_I2C_ICSTR_SCD_MASK (0x0020u)
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#define CSL_I2C_ICSTR_SCD_SHIFT (0x0005u)
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#define CSL_I2C_ICSTR_SCD_RESETVAL (0x0000u)
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/*----SCD Tokens----*/
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#define CSL_I2C_ICSTR_SCD_CLEAR (0x0000u)
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#define CSL_I2C_ICSTR_SCD_SET (0x0001u)
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#define CSL_I2C_ICSTR_ICXRDY_MASK (0x0010u)
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#define CSL_I2C_ICSTR_ICXRDY_SHIFT (0x0004u)
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#define CSL_I2C_ICSTR_ICXRDY_RESETVAL (0x0001u)
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/*----ICXRDY Tokens----*/
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#define CSL_I2C_ICSTR_ICXRDY_CLEAR (0x0000u)
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#define CSL_I2C_ICSTR_ICXRDY_SET (0x0001u)
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#define CSL_I2C_ICSTR_ICRRDY_MASK (0x0008u)
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#define CSL_I2C_ICSTR_ICRRDY_SHIFT (0x0003u)
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#define CSL_I2C_ICSTR_ICRRDY_RESETVAL (0x0000u)
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/*----ICRRDY Tokens----*/
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#define CSL_I2C_ICSTR_ICRRDY_CLEAR (0x0000u)
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#define CSL_I2C_ICSTR_ICRRDY_SET (0x0001u)
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#define CSL_I2C_ICSTR_ARDY_MASK (0x0004u)
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#define CSL_I2C_ICSTR_ARDY_SHIFT (0x0002u)
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#define CSL_I2C_ICSTR_ARDY_RESETVAL (0x0000u)
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/*----ARDY Tokens----*/
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#define CSL_I2C_ICSTR_ARDY_CLEAR (0x0000u)
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#define CSL_I2C_ICSTR_ARDY_SET (0x0001u)
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#define CSL_I2C_ICSTR_NACK_MASK (0x0002u)
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#define CSL_I2C_ICSTR_NACK_SHIFT (0x0001u)
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#define CSL_I2C_ICSTR_NACK_RESETVAL (0x0000u)
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/*----NACK Tokens----*/
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#define CSL_I2C_ICSTR_NACK_CLEAR (0x0000u)
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#define CSL_I2C_ICSTR_NACK_SET (0x0001u)
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#define CSL_I2C_ICSTR_AL_MASK (0x0001u)
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#define CSL_I2C_ICSTR_AL_SHIFT (0x0000u)
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#define CSL_I2C_ICSTR_AL_RESETVAL (0x0000u)
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/*----AL Tokens----*/
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#define CSL_I2C_ICSTR_AL_CLEAR (0x0000u)
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#define CSL_I2C_ICSTR_AL_SET (0x0001u)
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#define CSL_I2C_ICSTR_RESETVAL (0x0410u)
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/* ICCLKL */
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#define CSL_I2C_ICCLKL_ICCL_MASK (0xFFFFu)
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#define CSL_I2C_ICCLKL_ICCL_SHIFT (0x0000u)
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#define CSL_I2C_ICCLKL_ICCL_RESETVAL (0x0000u)
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#define CSL_I2C_ICCLKL_RESETVAL (0x0000u)
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/* ICCLKH */
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#define CSL_I2C_ICCLKH_ICCH_MASK (0xFFFFu)
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#define CSL_I2C_ICCLKH_ICCH_SHIFT (0x0000u)
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#define CSL_I2C_ICCLKH_ICCH_RESETVAL (0x0000u)
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#define CSL_I2C_ICCLKH_RESETVAL (0x0000u)
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/* ICCNT */
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#define CSL_I2C_ICCNT_ICDC_MASK (0xFFFFu)
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#define CSL_I2C_ICCNT_ICDC_SHIFT (0x0000u)
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#define CSL_I2C_ICCNT_ICDC_RESETVAL (0x0000u)
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#define CSL_I2C_ICCNT_RESETVAL (0x0000u)
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/* ICDRR */
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#define CSL_I2C_ICDRR_D_MASK (0x00FFu)
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#define CSL_I2C_ICDRR_D_SHIFT (0x0000u)
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#define CSL_I2C_ICDRR_D_RESETVAL (0x0000u)
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#define CSL_I2C_ICDRR_RESETVAL (0x0000u)
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/* ICSAR */
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#define CSL_I2C_ICSAR_SADDR_MASK (0x03FFu)
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#define CSL_I2C_ICSAR_SADDR_SHIFT (0x0000u)
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#define CSL_I2C_ICSAR_SADDR_RESETVAL (0x03FFu)
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#define CSL_I2C_ICSAR_RESETVAL (0x03FFu)
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/* ICDXR */
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#define CSL_I2C_ICDXR_D_MASK (0x00FFu)
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#define CSL_I2C_ICDXR_D_SHIFT (0x0000u)
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#define CSL_I2C_ICDXR_D_RESETVAL (0x0000u)
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#define CSL_I2C_ICDXR_RESETVAL (0x0000u)
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/* ICMDR */
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#define CSL_I2C_ICMDR_NACKMOD_MASK (0x8000u)
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#define CSL_I2C_ICMDR_NACKMOD_SHIFT (0x000Fu)
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#define CSL_I2C_ICMDR_NACKMOD_RESETVAL (0x0000u)
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/*----NACKMOD Tokens----*/
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#define CSL_I2C_ICMDR_NACKMOD_CLEAR (0x0000u)
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#define CSL_I2C_ICMDR_NACKMOD_SET (0x0001u)
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#define CSL_I2C_ICMDR_FREE_MASK (0x4000u)
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#define CSL_I2C_ICMDR_FREE_SHIFT (0x000Eu)
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#define CSL_I2C_ICMDR_FREE_RESETVAL (0x0000u)
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/*----FREE Tokens----*/
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#define CSL_I2C_ICMDR_FREE_CLEAR (0x0000u)
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#define CSL_I2C_ICMDR_FREE_SET (0x0001u)
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#define CSL_I2C_ICMDR_STT_MASK (0x2000u)
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#define CSL_I2C_ICMDR_STT_SHIFT (0x000Du)
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#define CSL_I2C_ICMDR_STT_RESETVAL (0x0000u)
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/*----STT Tokens----*/
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#define CSL_I2C_ICMDR_STT_CLEAR (0x0000u)
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#define CSL_I2C_ICMDR_STT_SET (0x0001u)
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#define CSL_I2C_ICMDR_STP_MASK (0x0800u)
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#define CSL_I2C_ICMDR_STP_SHIFT (0x000Bu)
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#define CSL_I2C_ICMDR_STP_RESETVAL (0x0000u)
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/*----STP Tokens----*/
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#define CSL_I2C_ICMDR_STP_CLEAR (0x0000u)
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#define CSL_I2C_ICMDR_STP_SET (0x0001u)
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#define CSL_I2C_ICMDR_MST_MASK (0x0400u)
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#define CSL_I2C_ICMDR_MST_SHIFT (0x000Au)
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#define CSL_I2C_ICMDR_MST_RESETVAL (0x0000u)
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/*----MST Tokens----*/
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#define CSL_I2C_ICMDR_MST_CLEAR (0x0000u)
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#define CSL_I2C_ICMDR_MST_SET (0x0001u)
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#define CSL_I2C_ICMDR_TRX_MASK (0x0200u)
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#define CSL_I2C_ICMDR_TRX_SHIFT (0x0009u)
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#define CSL_I2C_ICMDR_TRX_RESETVAL (0x0000u)
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/*----TRX Tokens----*/
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#define CSL_I2C_ICMDR_TRX_CLEAR (0x0000u)
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#define CSL_I2C_ICMDR_TRX_SET (0x0001u)
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#define CSL_I2C_ICMDR_XA_MASK (0x0100u)
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#define CSL_I2C_ICMDR_XA_SHIFT (0x0008u)
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#define CSL_I2C_ICMDR_XA_RESETVAL (0x0000u)
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/*----XA Tokens----*/
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#define CSL_I2C_ICMDR_XA_CLEAR (0x0000u)
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#define CSL_I2C_ICMDR_XA_SET (0x0001u)
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#define CSL_I2C_ICMDR_RM_MASK (0x0080u)
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#define CSL_I2C_ICMDR_RM_SHIFT (0x0007u)
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#define CSL_I2C_ICMDR_RM_RESETVAL (0x0000u)
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/*----RM Tokens----*/
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#define CSL_I2C_ICMDR_RM_CLEAR (0x0000u)
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#define CSL_I2C_ICMDR_RM_SET (0x0001u)
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#define CSL_I2C_ICMDR_DLB_MASK (0x0040u)
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#define CSL_I2C_ICMDR_DLB_SHIFT (0x0006u)
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#define CSL_I2C_ICMDR_DLB_RESETVAL (0x0000u)
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/*----DLB Tokens----*/
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#define CSL_I2C_ICMDR_DLB_CLEAR (0x0000u)
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#define CSL_I2C_ICMDR_DLB_SET (0x0001u)
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#define CSL_I2C_ICMDR_IRS_MASK (0x0020u)
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#define CSL_I2C_ICMDR_IRS_SHIFT (0x0005u)
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#define CSL_I2C_ICMDR_IRS_RESETVAL (0x0000u)
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/*----IRS Tokens----*/
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#define CSL_I2C_ICMDR_IRS_CLEAR (0x0000u)
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#define CSL_I2C_ICMDR_IRS_SET (0x0001u)
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#define CSL_I2C_ICMDR_STB_MASK (0x0010u)
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#define CSL_I2C_ICMDR_STB_SHIFT (0x0004u)
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#define CSL_I2C_ICMDR_STB_RESETVAL (0x0000u)
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/*----STB Tokens----*/
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#define CSL_I2C_ICMDR_STB_CLEAR (0x0000u)
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#define CSL_I2C_ICMDR_STB_SET (0x0001u)
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#define CSL_I2C_ICMDR_FDF_MASK (0x0008u)
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#define CSL_I2C_ICMDR_FDF_SHIFT (0x0003u)
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#define CSL_I2C_ICMDR_FDF_RESETVAL (0x0000u)
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/*----FDF Tokens----*/
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#define CSL_I2C_ICMDR_FDF_CLEAR (0x0000u)
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#define CSL_I2C_ICMDR_FDF_SET (0x0001u)
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#define CSL_I2C_ICMDR_BC_MASK (0x0007u)
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#define CSL_I2C_ICMDR_BC_SHIFT (0x0000u)
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#define CSL_I2C_ICMDR_BC_RESETVAL (0x0000u)
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/*----BC Tokens----*/
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#define CSL_I2C_ICMDR_BC_8BITS (0x0000u)
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#define CSL_I2C_ICMDR_BC_RSV (0x0001u)
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#define CSL_I2C_ICMDR_BC_2BITS (0x0002u)
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#define CSL_I2C_ICMDR_BC_3BITS (0x0003u)
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#define CSL_I2C_ICMDR_BC_4BITS (0x0004u)
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#define CSL_I2C_ICMDR_BC_5BITS (0x0005u)
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#define CSL_I2C_ICMDR_BC_6BITS (0x0006u)
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#define CSL_I2C_ICMDR_BC_7BITS (0x0007u)
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#define CSL_I2C_ICMDR_RESETVAL (0x0000u)
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/* ICIVR */
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#define CSL_I2C_ICIVR_INTCODE_MASK (0x0007u)
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#define CSL_I2C_ICIVR_INTCODE_SHIFT (0x0000u)
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#define CSL_I2C_ICIVR_INTCODE_RESETVAL (0x0000u)
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/*----INTCODE Tokens----*/
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#define CSL_I2C_ICIVR_INTCODE_NONE (0x0000u)
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#define CSL_I2C_ICIVR_INTCODE_AL (0x0001u)
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#define CSL_I2C_ICIVR_INTCODE_NACK (0x0002u)
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#define CSL_I2C_ICIVR_INTCODE_ARDY (0x0003u)
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#define CSL_I2C_ICIVR_INTCODE_RDR (0x0004u)
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#define CSL_I2C_ICIVR_INTCODE_TDR (0x0005u)
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#define CSL_I2C_ICIVR_INTCODE_SCD (0x0006u)
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#define CSL_I2C_ICIVR_INTCODE_AAS (0x0007u)
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#define CSL_I2C_ICIVR_RESETVAL (0x0000u)
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/* ICEMDR */
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#define CSL_I2C_ICEMDR_IGNACK_MASK (0x0002u)
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#define CSL_I2C_ICEMDR_IGNACK_SHIFT (0x0001u)
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#define CSL_I2C_ICEMDR_IGNACK_RESETVAL (0x0000u)
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/*----IGNACK Tokens----*/
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#define CSL_I2C_ICEMDR_IGNACK_CLEAR (0x0000u)
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#define CSL_I2C_ICEMDR_IGNACK_SET (0x0001u)
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#define CSL_I2C_ICEMDR_BCM_MASK (0x0001u)
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#define CSL_I2C_ICEMDR_BCM_SHIFT (0x0000u)
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#define CSL_I2C_ICEMDR_BCM_RESETVAL (0x0001u)
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/*----BCM Tokens----*/
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#define CSL_I2C_ICEMDR_BCM_CLEAR (0x0000u)
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#define CSL_I2C_ICEMDR_BCM_SET (0x0001u)
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#define CSL_I2C_ICEMDR_RESETVAL (0x0001u)
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/* ICPSC */
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#define CSL_I2C_ICPSC_IPSC_MASK (0x00FFu)
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#define CSL_I2C_ICPSC_IPSC_SHIFT (0x0000u)
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#define CSL_I2C_ICPSC_IPSC_RESETVAL (0x0000u)
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#define CSL_I2C_ICPSC_RESETVAL (0x0000u)
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/* ICPID1 */
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#define CSL_I2C_ICPID1_CLASS_MASK (0xFF00u)
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#define CSL_I2C_ICPID1_CLASS_SHIFT (0x0008u)
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#define CSL_I2C_ICPID1_CLASS_RESETVAL (0x0001u)
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#define CSL_I2C_ICPID1_REVISION_MASK (0x00FFu)
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#define CSL_I2C_ICPID1_REVISION_SHIFT (0x0000u)
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#define CSL_I2C_ICPID1_REVISION_RESETVAL (0x0006u)
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#define CSL_I2C_ICPID1_RESETVAL (0x0106u)
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/* ICPID2 */
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#define CSL_I2C_ICPID2_TYPE_MASK (0x00FFu)
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#define CSL_I2C_ICPID2_TYPE_SHIFT (0x0000u)
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#define CSL_I2C_ICPID2_TYPE_RESETVAL (0x0005u)
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#define CSL_I2C_ICPID2_RESETVAL (0x0005u)
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#endif
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